Stanford High Performance Networking Group

TTSim - C level simulator of the Tiny Tera


TTSim is a event-driven simulator that matches the hardware of the Tiny Tera at a system level. It is written in C and it was designed to debug the VHDL model of the Tiny Tera and to study the performance of the Tiny Tera switch.

You can get the programs from below: The source in tarred and gzipped form.


People involved in this project:

Page maintained by Pablo Molinero Fernández (molinero@klamath.stanford.edu)

Last modified: Wed Sep 23 16:02:57 PDT 1998